Document Type

Article

Publication Date

8-2002

Abstract

A 0.8 V folded cascode operational amplifier was designed in 0.18 μm standard CMOS technology. Emphasis was placed on observing the low voltage design and using a current driven bulk (CDB) technique to achieve this goal. The CDB technique was introduced as a method for low voltage design by reducing the threshold voltage. This design achieves 141 dB DC gain, 56 MHz 3 dB bandwidth and 65 GHz gain bandwidth, which is the working condition of pipeline ADCs.

Comments

The 2002 45th Midwest Symposium on Circuits and Systems, 2002. MWSCAS-2002. 4-7 Aug. 2002. volume 1: 267-270. http://dx.doi.org/10.1109/MWSCAS.2002.1187208